TAS5076 datasheet(33/64 Pages) TI

33 / 64 page

Serial Control Interface Register Definitions

SLES090A—November 2003—Revised January 2004

TAS5076

3.2

Error Status Register (0x01)

Table 3−3. Error Status Register

FUNCTION

−

FS error has occurred

−

Control pin change has occurred

−

LRCLK error

−

MCLK_IN count error

−

DCLK phase error with respect to MCLK_IN

−

MCLK_IN phase error with respect to DCLK

−

PWM timing error

No errors—no control pins changed (see Note 1)

NOTE 1: Write 00h to clear error indications in error status register.

3.3

System Control Register 0 (0x02)

Table 3−4. System Control Register 0

FUNCTION

−

Normal mode (in slave mode—quad speed detected if MCLK_IN = 128 Fs)

−

Double speed

−

Quad speed

−

Illegal

−

Use de-emphasis pin controls

−

Use de-emphasis I2C controls

−

No de-emphasis

−

De-emphasis for Fs = 32 kHz

−

De-emphasis for Fs = 44.1 kHz

−

De-emphasis for Fs = 48 kHz

−

16 bit, MSB first; right justified

−

20 bit, MSB first; right justified

−

24 bit, MSB first; right justified

−

16-bit I2S

−

20-bit I2S

−

24-bit I2S

−

16-bit MSB first

−

16-bit DSP frame

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