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STM8S005C6T6TR 데이터시트(PDF) 83 Page - STMicroelectronics |
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STM8S005C6T6TR 데이터시트(HTML) 83 Page - STMicroelectronics |
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83 / 103 page ![]() Figure 38: SPI timing diagram - slave mode and CPHA = 0 ai14134 CPHA= 0 MOSI I NPUT MISO OUT P UT CPHA= 0 MS B O UT M SB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 B I T1 IN NSS input tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) Figure 39: SPI timing diagram - slave mode and CPHA = 1 (1) ai14135 CPHA=1 MOSI I NPUT MISO OUT P UT CPHA=1 MS B O UT M SB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 B I T1 IN tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) NSS input 1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD. 83/103 DocID022186 Rev 3 Electrical characteristics STM8S005K6 STM8S005C6 |
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