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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC18F242 데이터시트(PDF) 241 Page - Microchip Technology |
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PIC18F242 데이터시트(HTML) 241 Page - Microchip Technology |
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241 / 332 page  © 2006 Microchip Technology Inc. DS39564C-page 239 PIC18FXX2 NEGF Negate f Syntax: [ label ] NEGF f [,a] Operands: 0 ≤ f ≤ 255 a ∈ [0,1] Operation: ( f ) + 1 → f Status Affected: N, OV, C, DC, Z Encoding: 0110 110a ffff ffff Description: Location ‘f’ is negated using two’s complement. The result is placed in the data memory location 'f'. If ’a’ is 0, the Access Bank will be selected, overriding the BSR value. If ’a’ = 1, then the bank will be selected as per the BSR value. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process Data Write register 'f' Example: NEGF REG, 1 Before Instruction REG = 0011 1010 [0x3A] After Instruction REG = 1100 0110 [0xC6] NOP No Operation Syntax: [ label ] NOP Operands: None Operation: No operation Status Affected: None Encoding: 0000 1111 0000 xxxx 0000 xxxx 0000 xxxx Description: No operation. Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode No operation No operation No operation Example: None. |
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