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PIC18F242 데이터시트(PDF) 195 Page - Microchip Technology |
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PIC18F242 데이터시트(HTML) 195 Page - Microchip Technology |
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195 / 332 page ![]() © 2006 Microchip Technology Inc. DS39564C-page 193 PIC18FXX2 18.2.1 REFERENCE VOLTAGE SET POINT The Internal Reference Voltage of the LVD module may be used by other internal circuitry (the Programmable Brown-out Reset). If these circuits are disabled (lower current consumption), the reference voltage circuit requires a time to become stable before a low voltage condition can be reliably detected. This time is invariant of system clock speed. This start-up time is specified in electrical specification parameter 36. The low voltage interrupt flag will not be enabled until a stable reference voltage is reached. Refer to the waveform in Figure 18-4. 18.2.2 CURRENT CONSUMPTION When the module is enabled, the LVD comparator and voltage divider are enabled and will consume static cur- rent. The voltage divider can be tapped from multiple places in the resistor array. Total current consumption, when enabled, is specified in electrical specification parameter #D022B. 18.3 Operation During SLEEP When enabled, the LVD circuitry continues to operate during SLEEP. If the device voltage crosses the trip point, the LVDIF bit will be set and the device will wake- up from SLEEP. Device execution will continue from the interrupt vector address if interrupts have been globally enabled. 18.4 Effects of a RESET A device RESET forces all registers to their RESET state. This forces the LVD module to be turned off. |
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