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PIC16F84A 데이터시트(PDF) 54 Page - Microchip Technology |
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PIC16F84A 데이터시트(HTML) 54 Page - Microchip Technology |
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54 / 337 page ![]() PIC16C6X DS30234D-page 54 © 1997 Microchip Technology Inc. FIGURE 5-4: BLOCK DIAGRAM OF THE RB7:RB4 PINS FOR PIC16C62A/63/R63/64A/65A/ R65/66/67 Data Latch From other RBPU(2) P VDD I/O Q D CK Q D CK QD EN QD EN Data bus WR Port WR TRIS Set RBIF TRIS Latch RD TRIS RD Port RB7:RB4 pins weak pull-up RD Port Latch TTL Input Buffer pin(1) Note 1: I/O pins have diode protection to VDD and VSS. ST Buffer RB7:RB6 in serial programming mode Q3 Q1 2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RPBU bit (OPTION<7>). FIGURE 5-5: BLOCK DIAGRAM OF THE RB3:RB0 PINS Data Latch RBPU(2) P VDD Q D CK Q D CK QD EN Data bus WR Port WR TRIS RD TRIS RD Port weak pull-up RD Port RB0/INT I/O pin(1) TTL Input Buffer Schmitt Trigger Buffer TRIS Latch Note 1: I/O pins have diode protection to VDD and VSS. 2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RPBU bit (OPTION<7>). TABLE 5-3: PORTB FUNCTIONS TABLE 5-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB Name Bit# Buffer Type Function RB0/INT bit0 TTL/ST(1) Input/output pin or external interrupt input. Internal software programmable weak pull-up. RB1 bit1 TTL Input/output pin. Internal software programmable weak pull-up. RB2 bit2 TTL Input/output pin. Internal software programmable weak pull-up. RB3 bit3 TTL Input/output pin. Internal software programmable weak pull-up. RB4 bit4 TTL Input/output pin (with interrupt on change). Internal software programmable weak pull-up. RB5 bit5 TTL Input/output pin (with interrupt on change). Internal software programmable weak pull-up. RB6 bit6 TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable weak pull-up. Serial programming clock. RB7 bit7 TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable weak pull-up. Serial programming data. Legend: TTL = TTL input, ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt. 2: This buffer is a Schmitt Trigger input when used in serial programming mode. Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other resets 06h, 106h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuuu 86h, 186h TRISB PORTB Data Direction Register 1111 1111 1111 1111 81h, 181h OPTION RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB. |
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