| 전자부품 데이터시트 검색엔진 |
|
AS3606 데이터시트(PDF) 35 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS3606 데이터시트(HTML) 35 Page - ams AG |
|
35 / 71 page ![]() www.austriamicrosystems.com Revision 1.03 34 - 70 AS3606 AS3607 2v2 Data Sheet - D e t a i l e d D e s c r i p t i o n - S Y S T E M F u n c t i o n s 9.7.2 Parameter Figure 20. 2-Wire Serial Timing DVDD =2.9V, Tamb=25ºC, unless otherwise specified. Table 17. 2-Wire Serial Parameter Symbol Parameter Condition Min Typ Max Unit VCSL CSCL, CSDA Low Input Level (max 30%DVDD) 0 - 0.87 V VCSH CSCL, CSDA High Input Level CSCL, CSDA (min 70%DVDD) 2.03 - 5.5 V HYST CSCL, CSDA Input Hysteresis 200 450 800 mV VOL CSDA Low Output Level at 3mA - - 0.4 V Tsp Spike insensitivity 50 100 - ns TH Clock high time max. 400kHz clock speed 500 ns TL Clock low time max. 400kHz clock speed 500 ns TSU CSDA has to change Tsetup before rising edge of CSCL 250 - - ns THD No hold time needed for CSDA relative to rising edge of CSCL 0-- ns TS CSDA H hold time relative to CSDA edge for start/stop/rep_start 200 - - ns TPD CSDA prop delay relative to lowgoing edge of CSCL 50 ns 8 1-7 CSCL CSDA 8 9 8 1-7 8 9 8 1-7 8 9 Start Condition Address R/W ACK Data ACK Data ACK Stop Condition TS TSU TH TL THD TPD |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |