AS3687 datasheet(47/55 Pages) AMSCO

47 / 55 page

AS3687/87XM

Datasheet

www.austriamicrosystems.com/AS3687

1v3-4

46 - 54

Figure

37 – Serial Interface Byte Write

reg_data

A P

Write Register

WA++

AS3687/87XM

(= Slave) receives data

AS3687/87XM

(= Slave) transmits data

Figure

38 – Serial Interface Page Write

reg_data 1

reg_data 2

…

reg_data n

A P

Write Register

WA++

Write Register

WA++

Write Register

WA++

AS3687/87XM

(= Slave) receives data

AS3687/87XM

(= Slave) transmits data

Byte Write and Page Write formats are used to write data to the slave.

The transmission begins with the START condition, which is generated by the master when the bus is in IDLE

state (the bus is free). The device-write address is followed by the word address. After the word address any

number of data bytes can be sent to the slave. The word address is incremented internally, in order to write

subsequent data bytes on subsequent address locations.

For reading data from the slave device, the master has to change the transfer direction. This can be done either

with a repeated START condition followed by the device-read address, or simply with a new transmission START

followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed

by the 1st register byte transmitted from the slave. In Read Mode any number of subsequent register bytes can

be read from the slave. The word address is incremented internally.

The following diagrams show the serial read formats supported by the AS3687/87XM.

Figure

39 – Serial Interface Random Read

A Sr

data

N P

Read Register

WA++

AS3687/87XM

(= Slave) receives data

AS3687/87XM

(= Slave) transmits data

Random Read and Sequential Read are combined formats. The repeated START condition is used to change the

direction after the data transfer from the master.

The word address transfer is initiated with a START condition issued by the master while the bus is idle. The

START condition is followed by the device-write address and the word address.

In order to change the data direction a repeated START condition is issued on the 1st CLK pulse after the

ACKNOWLEDGE bit of the word address transfer. After the reception of the device-read address, the slave

becomes the transmitter. In this state the slave transmits register data located by the previous received word

address vector. The master responds to the data byte with a NOT ACKNOWLEDGE, and issues a STOP

condition on the bus.

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