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AS3930 데이터시트(PDF) 19 Page - ams AG

부품명 AS3930
상세설명  Single Channel Low Frequency Wakeup Receiver
PDF  32 Pages
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제조업체  AMSCO [ams AG]
홈페이지  http://www.ams.com
Logo AMSCO - ams AG

AS3930 데이터시트(HTML) 19 Page - ams AG

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Revision 1.5
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AS3930
Datasheet - Detailed Descr i p ti on
8.3.2 Antenna Damper
The antenna damper allows the chip to deal with higher field strength, it is enabled by register R1<4>. It consists of shunt resistors which
degrade the quality factor of the resonator by reducing the signal at the input of the amplifier. In this way the resonator sees a smaller parallel
resistance (in the band of interest) which degrades its quality factor in order to increase the linear range of the channel amplifier (the amplifier
does not saturate in presence of bigger signals). Table 16 shows the bit setup.
8.4 Demodulator / Data Slicer
The performance of the demodulator can be optimized according to bit rate and preamble length as described in Table 17 and Table 18.
If the bit rate gets higher, the time constant in the envelop detector must be set to a smaller value. This means that higher noise is injected
because of the wider band. The next table is a rough indication of how the envelop detector looks like for different bit rates. By using proper data
slicer settings it is possible to improve the noise immunity paying the penalty of a longer preamble. In fact if the data slicer has a bigger time
constant it is possible to reject more noise, but every time a transmission occurs, the data slicer need time to settle. This settling time will
influence the length of the preamble. Table 18 gives a correlation between data slicer setup and minimum required preamble length.
Note:
These times are minimum required, but it is recommended to prolong the preamble.
Table 16. Antenna Damper Bit Setup
R4<5>
R4<4>
Shunt Resistor (parallel to the resonator at 125 kHz)
00
1 k
Ω
01
3 k
Ω
10
9 k
Ω
1
1
27 k
Ω
Table 17. Bit Setup for Envelop Detector for Different Symbol Rates
R3<2>
R3<1>
R3<0>
Symbol Rate [Manchester symbols/s]
0
0
0
4096
0
0
1
2184
0
1
0
1490
01
1
1130
1
0
0
910
1
0
1
762
1
1
0
655
1
1
1
512
Table 18. Bit Setup for Data Slicer for Different Preamble Length
R3<5>
R3<4>
R3<3>
Minimum Preamble Length [ms]
00
0
0.8
00
1
1.15
01
0
1.55
01
1
1.9
10
0
2.3
10
1
2.65
11
0
3
11
1
3.5



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