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AS5263

Datasheet - Detailed Descr i pti on

7.1 Operation

The AS5263 operates at 5V ±10%, using two internal Low-Dropout (LDO) voltage regulators. For operation, the 5V supply is connected to pin

VDD. While VDD3 and VDD5 (LDO outputs) must be buffered by 2.2µF capacitors, the VDD requires a 1µF capacitor. All capacitors (low ESR

ceramic) are supposed to be placed close to the supply pins (see Figure 3).

The VDD3 and VDD5 outputs are intended for internal use only. It must not be loaded with an external load.

Figure 3. External Circuitry for the AS5263 (figure shows only one sensor die)

7.1.1 VDD Voltage Monitor

time, then the device enters a low power mode reducing the power consumption. When the overvoltage event has passed and the voltage

applied to the VDD pin falls below the overvoltage lower threshold for longer than the recovery time, then the device enters the normal mode.

the VDD5_detection time, then the device stops the clock of the digital part and the output drivers are turned off to reduce the power

consumption. When the voltage applied to the VDD5 pin exceeds the VDD5 undervoltage upper threshold for longer than the VDD5_recovery

time, then the clock is restarted and the output drivers are turned on.

2.2µF

1µF

4.5 - 5.5V

VDD5_T

GNDD_T

VDD_T

5V Operation

Internal

VDD4.5V

LDO

Internal

VDD3.45V

VDD3_T

LDO

2.2µF

GNDA_T

GNDP_T

Notes:

1. The pins VDD3 and VDD5 must always be buffered by a capacitor. These pins must not be left floating, as this may

cause unstable internal supply voltages, which may lead to larger output jitter of the measured angle.

2. Only VDD is overvoltage protected up to 27V. In addition, the VDD has a reverse polarity protection.