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AS8222 데이터시트(PDF) 30 Page - ams AG

부품명 AS8222
상세설명  Enhanced FlexRay Standard Transceiver
PDF  43 Pages
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제조업체  AMSCO [ams AG]
홈페이지  http://www.ams.com
Logo AMSCO - ams AG

AS8222 데이터시트(HTML) 30 Page - ams AG

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AS8222
Datasheet - Detailed Descr i p ti on
www.ams.com/eng/FlexRay/AS8222
Revision 1.0
29 - 42
7.15 Error and Status Flags Read Out
The error and status flag readout mechanism is a serial transmission which is controlled with the EN pin and the information is submitted on the
ERRN pin. The mechanism is only activated in NORMAL and RECEIVE-ONLY mode. In all other operation modes the error and status
information cannot be accessed.
Figure 6. Timing of the Readout Mechanism
The error and status flags are read out by applying a clock signal to pin EN. A falling edge on pin EN starts the readout loading the content of the
error/status flag into the shift register and signaling the stream of flags on the ERRN pin. On the second falling edge the first flag (Bit 0) will be
shifted out. The ERRN data is valid after tRO_PROP_ERRN. If EN pin keeps on toggling after last flag (Bit 15) the next flag shifted out is Bit 0. The
complete list of bits is shown in Table 22. If no transition is detected on pin EN for longer than tRO_EN_TIMEOUT the device enters the operation
mode indicated by the host pins.
Table 22. Bit Order for the Readout Sequence
BIT
Flag Description
Bit 0
Undervoltage VBAT detected
Bit 1
Undervoltage VIO detected
Bit 2
Undervoltage VCC detected
Bit 3
Bus error
Bit 4
BGE status
Bit 5
BP short circuit to VCC
Bit 6
BP short circuit to GND
Bit 7
Bus open line
Bit 8
BM short circuit to VCC
Bit 9
BM short circuit to GND
Bit 10
Short circuit between BP and BM
Bit 11
Over temperature
Bit 12
TxEN_BGE timeout
Bit 13
Local wake flag
Bit 14
Remote wake flag
Bit 15
Power on flag
ERRN
70% VIO
30% VIO
ERROR FLAG
Bit 0
Bit 1
Bit 2
70% VIO
30% VIO
t < tRO_EN_TIMEOUT
tRO_PROP_ERRN
t > tRO_EN__TIMEOUT
Bit 3
ERRN
ERRN
EN



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