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24C01 데이터시트(PDF) 7 Page - ATMEL Corporation

부품명 24C01
상세설명  2-Wire Serial EEPROM
PDF  10 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

24C01 데이터시트(HTML) 7 Page - ATMEL Corporation

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AT24C01
7
Write Operations
BYTE WRITE: Following a start condition, a write operation
requires a 7-bit data word address and a low write bit. Upon
receipt of this address, the EEPROM will again respond
with a zero and then clock in the first 8-bit data word. Fol-
lowing receipt of the 8-bit data word, the EEPROM will out-
pu t a zer o a nd the add r e ssing device , su ch as a
microcontroller, must terminate the write sequence with a
stop condition. At this time the EEPROM enters an inter-
nally-timed write cycle to the nonvolatile memory. All inputs
are disabled during this write cycle , t
WR, and the EEPROM
will not respond until the write is complete (refer to Figure
1).
PAGE WRITE: The AT24C01 is capable of a 4-byte page
write.
A page write is initiated the same as a byte write but the
microcontroller does not send a stop condition after the first
data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcon-
troller can transmit up to three more data words. The
EEPROM will respond with a zero after each data word
received. The microcontroller must terminate the page
write sequence with a stop condition (refer to Figure 2).
The data word address lower 2 bits are internally incre-
mented following the receipt of each data word. The higher
five data word address bits are not incremented, retaining
the memory page row location. When the word address,
internally generated, reaches the page boundary, the fol-
lowing byte is placed at the beginning of the same page. If
more than four data words are transmitted to the EEPROM,
the data word address will “roll over” and previous data will
be overwritten.
ACKNOWLEDGE POLLING: Once the internally-timed
write cycle has started and the EEPROM inputs are dis-
abled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the EEPROM respond with a zero allowing the read or
write sequence to continue.
Read Operations
Read operations are initiated the same way as write opera-
tions with the exception that the read/write select bit in the
device address word is set to one. There are two read
operations: byte read and sequential read.
BYTE READ: A byte read is initiated with a start condition
followed by a 7-bit data word address and a high read bit.
The AT24C01 will respond with an acknowledge and then
serially output 8 data bits. The microcontroller does not
respond with a zero but does generate a following stop
condition (refer to Figure 3).
SEQUENTIAL READ: Sequential reads are initiated the
same as a byte read. After the microcontroller receives an
8-bit data word, it responds with an acknowledge. As long
as the EEPROM receives an acknowledge, it will continue
to increment the data word address and serially clock out
sequential data words. When the memory address limit is
reached, the data word address will “roll over” and the
sequential read will continue. The sequential read opera-
tion is terminated when the microcontroller does not
respond with an input zero but does generate a following
stop condition (refer to Figure 4).
Figure 1. Byte Write



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