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MPC5601PEF0MLL4R 데이터시트(PDF) 40 Page - Freescale Semiconductor, Inc

부품명 MPC5601PEF0MLL4R
상세설명  MPC5602P Microcontroller Data Sheet
PDF  95 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
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MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
40
3.5
Thermal characteristics
3.5.1
Package thermal characteristics
3.5.2
General notes for specifications at maximum junction temperature
An estimation of the chip junction temperature, TJ, can be obtained from Equation 1:
TJ = TA + (RJA * PD)
Eqn. 1
where:
TA = ambient temperature for the package (°C)
RJA = junction-to-ambient thermal resistance (°C/W)
PD = power dissipation in the package (W)
The junction-to-ambient thermal resistance is an industry standard value that provides a quick and easy estimation of thermal
performance. Unfortunately, there are two values in common usage: the value determined on a single layer board and the value
obtained on a board with two planes. For packages such as the PBGA, these values can be different by a factor of two. Which
value is closer to the application depends on the power dissipated by other components on the board. The value obtained on a
single layer board is appropriate for the tightly packed printed circuit board. The value obtained on the board with the internal
planes is usually appropriate if the board has low power dissipation and the components are well separated.
When a heat sink is used, the thermal resistance is expressed in Equation 2 as the sum of a junction-to-case thermal resistance
and a case-to-ambient thermal resistance:
RJA = RJC + RCA
Eqn. 2
Table 10. LQFP thermal characteristics
Symbol
Parameter
Conditions
Typical value
Unit
100-pin
64-pin
RJA
Thermal resistance junction-to-ambient, natural
convection1
1 Junction-to-ambient thermal resistance determined per JEDEC JESD51-7. Thermal test board meets JEDEC specification for
this package.
Single layer board—1s
63
57
°C/W
Four layer board—2s2p
51
41
°C/W
RJB
Thermal resistance junction-to-board2
2 Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for
the specified package. When Greek letters are not available, the symbols are typed as RthJB or Theta-JB.
Four layer board—2s2p
33
22
°C/W
RJCtop Thermal resistance junction-to-case (top)3
3 Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used
for the case temperature. Reported value includes the thermal resistance of the interface layer.
Single layer board—1s
15
13
°C/W
JB
Junction-to-board, natural convection4
4 Thermal characterization parameter indicating the temperature difference between the board and the junction temperature per
JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JB.
Operating conditions
33
22
°C/W
JC
Junction-to-case, natural convection5
5 Thermal characterization parameter indicating the temperature difference between the package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as
Psi-JC.
Operating conditions
1
1
°C/W



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