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LM98714CCMT/NOPB 데이터시트(PDF) 4 Page - Texas Instruments

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부품명 LM98714CCMT/NOPB
상세설명  LM98714 Three Channel, 16-Bit, 45 MSPS Analog Front End with LVDS/CMOS Output
PDF  114 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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LM98714CCMT/NOPB 데이터시트(HTML) 4 Page - Texas Instruments

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If using an LVDS input clock, temi
nate clock at the
pins with a 100 Ohm resistor and rem
ove 0 Ohm resistor
from INCLK- to
ground.
If using a CMOS input clock, short
the INCLK- pin to
ground and remove the 100 Ohm L
VDS termination
resistor.
Maintain 100 Ohm Impedance for all
LVDS differential
pair paths.
CCD Clock
Driver(s)
CCD or CIS
Image Sensor
Flexible CCD Timing Gener
ator Outputs
Serial Interface and device
control bus
Image
Sensor
Clock
Inputs
Connector
**
**
*
*
*
**
Connector
Ribbon
Cable
LVDS
Deserial
izer
(DS90CR218A
or equiv.)
ASIC
CLOCK Gen
<Doc>
A
LM98714 Typical Application Diagram
National Semiconductor Corporation
East Coast Labs Design Center
B
1
1
Friday, January 27, 2006
Title
Size
Document Number
Rev
Date:
Sheet
of
TXOUT0-
TXOUT1+
TXOUT0+
TXOUT1-
TXCLK+
TXCLK-
INCLK-
INCLK+
TXOUT2-
TXOUT2+
CLK5
CLK6
CLK7
CLK8
CLK9
CLK10
CLK2
CLK1
SH
CLK3
CLK4
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
LM98714
1
2
3
4
5
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8
9
10
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14
15
16
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38
46
26
27
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29
30
31
32
33
34
35
37
36
39
40
41
42
43
44
45
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48
CLK3
CLK2
CLK1
SH
RESET
SH_R
SDIO
SCLK
SEN
AGND
VA
VREFB
VREFT
VA
AGND
VCLP
VA
AGND
OSr
AGND
OSg
AGND
OSb
AGND
DGND
DGND
DGND
VR
DVB
INCLK+
INCLK-
D7_TXCLK+
D6_TXCLK-
D5_TXOUT2+
D4_TXOUT2-
D3_TXOUT1+
D2_TXOUT1-
D0_TXOUT0-
D1_TXOUT0+
VD
CLKOUT_CLK10
CLK9
CLK8
CLK7
CLK6
CLK5
VC
CLK4
0.1uF
0.1uF
0.1uF
R_lvds_clk
100 Ohm
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R_cmos_clk
0 Ohm
0.1uF
4.7uF
LM98714
SNAS254A – OCTOBER 2006 – REVISED JANUARY 2014
www.ti.com
Typical Application Diagram
Figure 4. Typical Application Diagram
4
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Product Folder Links: LM98714



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