LD1072SS datasheet(7/34 Pages) LDT

7 / 34 page

Ver1.0

LD1072

16-CH LED DRIVER WITH DOT CORRECTION AND 12-BIT PWM CONTROL

CHARACTERISTI

TEST CONDITIONS

SYMBOL

MIN.

TYP.

MAX.

UNIT

Data shift clock

frequency

CLK

(CLK)

MHz

Grayscale clock

frequency

PWMCK

(PWMCK)

MHz

CLK pulse

duration

CLK = H/L (See Figure 14)

wh0 /wl0

PWMCK pulse

duration

PWMCK = H/L (See Figure 14)

wh1 /wl1

ST pulse duration

ST = H (See Figure 14)

wh2

OEB pulse duration

OEB = H (See Figure 14)

wh3

Setup time

DIN - CLK

↑ (See Figure 14)

su0

CLK

↓- ST↑ (See Figure 14)

su1

MOD

↑↓ - ST↑ (See Figure 14)

su2

OEB

↓ - PWMCK↑ (See Figure 14)`

su3

↑ - PWMCK↑ (See Figure 14)

su4

Hold time

CLK

↑ - DIN (See Figure 14)

↓ - CLK↑ (See Figure 14)

CLK

↑ - MOD↑↓ (See Figure 14)

↓ - MOD↑↓ (See Figure 14)

PWMCK

↑ - OEB↑ (See Figure 14)

AC CHRACTERISTICS

DD=3V to 5.5V, TA = -40℃

℃

℃ to 85℃

℃

℃) (unless otherwise noted)

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