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ADM8324 데이터시트(PDF) 6 Page - Analog Devices |
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ADM8324 데이터시트(HTML) 6 Page - Analog Devices |
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6 / 16 page ![]() ADM8323/ADM8324 Data Sheet Rev. 0 | Page 6 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. ADM8323/ADM8324 Pin Configuration Table 3. ADM8323/ADM8324 Pin Function Descriptions Pin No. Mnemonic Description 1 RESET Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull output stage for the ADM8323 and an open-drain output stage for the ADM8324. 2 GND Ground. 3 MR Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time, generates a reset. It features a 75 kΩ internal pull-up resistor. 4 WDI Watchdog Input. Generates a reset if the WDI pulse is not within the watchdog window. 5 VCC Power Supply Voltage Being Monitored. RESET GND MR 1 3 2 VCC 5 WDI 4 ADM8323/ ADM8324 TOP VIEW (Not to Scale) |
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