PM8903 datasheet(19/34 Pages) STMICROELECTRONICS

19 / 34 page

PM8903

Application information

Doc ID 022748 Rev 1

19/34

Application information

6.1

Compensation network

The PM8903 implements a voltage mode control loop (see

Figure 11). The output voltage is

regulated to the internal reference (offset resistor between FB node and GND can be

neglected in control loop calculation).

Error amplifier output is compared with the oscillator sawtooth waveform to provide the

PWM signal to the driver section. The PWM signal is then transferred to the switching node

with VIN amplitude. This waveform is filtered by the output filter.

The converter transfer function is the small signal transfer function between the output of the

EA and VOUT. This function has a double pole at frequency FLC depending on the L-C output

filter and a zero at FESR depending on the output capacitor ESR. The DC gain of the

modulator is simply the input voltage VIN divided by the peak-to-peak oscillator voltage

ΔVOSC.

Figure 11.

PM8903 control loop

The compensation network closes the loop joining VOUT and EA output with a transfer

function ideally equal to -ZF/ZFB.

The compensation goal is to close the control loop assuring high DC regulation accuracy,

good dynamic performance, and stability. To achieve this, the overall loop needs high DC

gain, high bandwidth and good phase margin.

High DC gain is achieved giving an integrator shape to the compensation network transfer

function. Loop bandwidth (F0dB) can be fixed choosing the right RF/RFB ratio, however, for

RFB

ESR

COUT

VOUT

ROS

DCR

OSC

DRIVER

ΔV

OSC

ERROR

AMPLIFIER

Modulator

Output Filter

ZFB

VREF

VIN

PHASE

PM8903 데이터시트(PDF) 19 Page - STMicroelectronics

PM8903 데이터시트(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

데이터시트 다운로드

링크 URL