5CSXFC6D datasheet(15/35 Pages) ALTERA

15 / 35 page

Figure 6: Sample Ordering Code and Available Options for Cyclone V ST Devices

Family Signature

Embedded Hard IPs

Transceiver Count

Transceiver

Speed Grade

Package Type

Package Code

Operating Temperature

FPGA Fabric

Speed Grade

Optional Suffix

Indicates specific device

options or shipment method

ST : SoC with 5-Gbps transceivers

F : 2 hard PCIe controllers

and 1 hard memory controller

5C : Cyclone V

D5 : 85K logic elements

D6 : 110K logic elements

D : 9

5 : 5 Gbps

F : FineLine BGA (FBGA)

31 : 896 pins

C : Commercial (TJ = 0° C to 85° C)

: Industrial (TJ = -40° C to 100° C)

A : Automotive (TJ = -40° C to 125° C)

6 (fastest)

N : Lead-free packaging

Contact Altera for availability

of leaded options

ES : Engineering sample

Member Code

Family Variant

Maximum Resources

Table 14: Maximum Resource Counts for Cyclone V ST Devices

Member Code

Resource

110

Logic Elements (LE) (K)

41,509

32,075

ALM

166,036

128,300

5,570

3,970

M10K

Memory (Kb)

621

480

MLAB

112

Variable-precision DSP Block

224

174

18 x 18 Multiplier

FPGA PLL

HPS PLL

5 Gbps Transceiver

288

FPGA GPIO

(8)

181

HPS I/O

Transmitter

LVDS

Receiver

PCIe Hard IP Block

FPGA Hard Memory Controller

(8) The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os

includes transceiver I/Os.

Altera Corporation

Cyclone V Device Overview

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Maximum Resources

CV-51001

2013.12.26

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