(c) 2014. Renesas Electronics Corporation. All rights reserved.

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Date:

Apr. 2, 2014

RENESAS TECHNICAL UPDATE

1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 Japan

Renesas Electronics Corporation

Product

Category

MPU/MCU

Document

No.

TN-

SH7-A883A/E

Rev.

1.00

Title

Correction of errors regarding

Internal Bus of the Bus State Controller (BSC)

Information

Category

Technical Notification

Applicable

Product

• SH7214 Group

• SH7216 Group

Lot No.

Reference

Document

• SH7214 Group, SH7216 Group User’s

Manual: Hardware Rev.4.00

(R01UH0230EJ0400)

All lots

We would like to inform you of the correction of errors in the above listed user's manuals. Please refer to the following for

details.

<Corrections>

9.5.8 SRAM Interface with Byte Selection

Erroneous:

64K

×16-bit

This LSI

SDRAM

Figure 9.41 Example of Connection with 16-Bit Data-Width SRAM with Byte Selection

Corrected:

64K×16-bit

This LSI

SRAM

Figure 9.41 Exa mple of Connection with 16-Bit Data-Width SRAM with Byte Selection

A16

A1

CSn

RD

RD/WR

D15

D0

WRHH

WRHL

A15

A0

CS

OE

WE

I/O15

I/O0

UB

LB

A16

A1

CSn

RD

RD/WR

D15

D0

WRH

WRL

A15

A0

CS

OE

WE

I/O15

I/O0

UB

LB