THS4221DBVT datasheet(21/41 Pages) NSC

21 / 41 page

THS4221, THS4225

THS4222, THS4226

SLOS399G − AUGUST 2002 − REVISED JANUARY 2004

www.ti.com

PDmax +

Tmax–TA

qJA

where:

PDmax is the maximum power dissipation in the amplifier (W).

Tmax is the absolute maximum junction temperature (°C).

TA is the ambient temperature (°C).

θJA = θJC + θCA

θJC is the thermal coefficient from the silicon junctions to the

case (°C/W).

θCA is the thermal coefficient from the case to ambient air

(°C/W).

For systems where heat dissipation is more critical, the

THS4222 family is offered in MSOP with PowerPAD. The

thermal coefficient for the MSOP PowerPAD package is

substantially improved over the traditional SOIC.

Maximum power dissipation levels are depicted in the

graph for the two packages. The data for the DGN

package assumes a board layout that follows the

PowerPAD layout guidelines referenced above and

detailed in the PowerPAD application notes in the

Additional Reference Material section at the end of the

data sheet.

1.5

−40

−20

2.5

3.5

TA − Ambient Temperature − °C

8-Pin DGN Package

θJA = 170°C/W for 8-Pin SOIC (D)

θJA = 58.4°C/W for 8-Pin MSOP (DGN)

ΤJ = 150°C, No Airflow

Figure 38. Maximum Power Dissipation vs

Ambient Temperature

0.5

8-Pin D Package

When determining whether or not the device satisfies the

maximum power dissipation requirement, it is important to

consider not only quiescent power dissipation, but also

dynamic power dissipation. Often maximum power

dissipation is difficult to quantify because the signal pattern

is inconsistent, but an estimate of the RMS power

dissipation can provide visibility into a possible problem.

DESIGN TOOLS

Evaluation Fixtures, Spice Models, and

Applications Support

Texas Instruments is committed to providing its customers

with the highest quality of applications support. To support

this goal, evaluation boards have been developed for the

THS4222 family of operational amplifiers. The boards are

easy to use, allowing for straight-forward evaluation of the

device. These evaluation boards can be ordered through

the Texas Instruments web site, www.ti.com, or through

your local Texas Instruments sales representative.

Schematics for the two evaluation boards are shown

below with their default component values. Unpopulated

footprints are shown to provide insight into design

flexibility.

Figure 39. THS4222 EVM Circuit

Configuration

VS+

PwrPad

U1:A

TP1

U1:B

R10

R11

R12

VS−

VS+

FB2

C10

FB1

VS−

GND

VS+

VS−

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