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ICS953002 데이터시트(PDF) 24 Page - Integrated Circuit Systems

부품명 ICS953002
상세설명  Programmable Timing Control Hub for Next Gen P4 processor
PDF  35 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS953002 데이터시트(HTML) 24 Page - Integrated Circuit Systems

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24
Integrated
Circuit
Systems, Inc.
ICS953002
0924—11/18/09
I
2C Table: Byte Count Register
Bit 7
BC7
RW
0
Bit 6
BC6
RW
0
Bit 5
BC5
RW
0
Bit 4
BC4
RW
0
Bit 3
BC3
RW
1
Bit 2
BC2
RW
1
Bit 1
BC1
RW
1
Bit 0
BC0
RW
1
I
2C Table: WD Time Control Register
Bit 7
WDEN
Watchdog Enable
RW
0
Bit 6
WDSEN
Watchdog Soft Reset
Enable
RW
0
Bit 5
WD Alarm Status
WD Alarm Status
R
x
Bit 4
WD Soft Status
WD Soft Reset Status
R
x
Bit 3
WDTCtrl
Watch Dog Time base
Control
RW
0
Bit 2
WD2
WD Timer Bit 2
RW
1
Bit 1
WD1
WD Timer Bit 1
RW
1
Bit 0
WD0
WD Timer Bit 0
RW
1
I
2C Table: M/N Programming & WD Safe Frequency Control Register
Bit 7
Reserved
Reserved
RW
1
Bit 6
Reserved
Reserved
RW
1
Bit 5
WD Safe Freq
Source
WD Safe Freq Source
RW
0
Bit 4
WD SF4
RW
0
Bit 3
WD SF3
RW
0
Bit 2
WD SF2
RW
0
Bit 1
WD SF1
RW
0
Bit 0
WD SF0
RW
0
I
2C Table: PLL1 Frequency Control Register
Bit 7
N Div8
N Divider Prog bit 8
RW
X
Bit 6
N Div9
N Divider Prog bit 9
RW
X
Bit 5
M Div5
RW
X
Bit 4
M Div4
RW
X
Bit 3
M Div3
RW
X
Bit 2
M Div2
RW
X
Bit 1
M Div1
RW
X
Bit 0
M Div0
RW
X
Name
Byte 8
Pin #
-
-
Watch Dog Safe Freq
Programming bits
-
-
-
-
-
-
-
Byte 9
Pin #
Name
-
PWD
M Divider
Programming bits
Type
Type
PWD
PWD
Type
01
1
PWD
-
Byte Count
Programming b(7:0)
-
-
-
-
-
-
-
Type
-
-
-
-
Byte 10
Pin #
Control Function
Name
-
Byte 11
Pin #
Name
-
-
-
-
-
-
-
-
-
Control Function
Control Function
Control Function
0
Alarm
The decimal representation of M and N
Divier in Byte 11 and 12 will configure the
PLL1 VCO frequency. Default at power
up = latch-in or Byte 0 Rom table.
VCO Frequency = 14.318 x [NDiv(9:0)+8]
/ [MDiv(5:0)+2]
Disable
Enable
1160ms Base
Writing to this register will configure how
many bytes will be read back, default is
0F = 15 bytes.
Writing to these bit will configure the safe
frequency as Byte0 bit (4:0).
-
-
B10b(4:0)
These bits represent X*290ms (or 1.16S)
the watchdog timer waits before it goes to
alarm mode. Default is 7 X 290ms = 2s.
290ms Base
01
Disable
Enable
01
Normal
Normal
Latch Inputs
-
-
Alarm



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