THS7530PWPR datasheet(11/24 Pages) NSC

11 / 24 page

0.1 F

33pF

0.1 F

6.8 F

33pF

1kW

24.9 W

THS7530

OUT

S-

G-

CL-

CL+

OCM

G+

S+ =5V

1:1

50 W

0.1 F

33pF

0.1 F

6.8 F

0.1 F

33pF

1kW

24.9 W

49.9 W

24.9 W

THS7530

OUT+

OUT-

S-

G-

CL-

CL+

OCM

G+

S+ =5V

0.1 F

33pF

0.1 F

6.8 F

0.1 F

33pF

1kW

24.9 W

THS7530

OUT+

IN-

OUT-

IN+

S-

G-

CL-

CL+

OCM

G+

S+ =5V

THS7530

www.ti.com

SLOS405C – DECEMBER 2002 – REVISED FEBRUARY 2010

APPLICATION INFORMATION

The THS7530 is designed for nominal 5-V power

Figure 20 through Figure 24 show some basic circuit

supply from VS+ to VS–.

configurations.

The amplifier has fully differential inputs, VIN+ and

VIN–, and fully differential outputs, VOUT+ and VOUT–

The inputs are high impedance and outputs are low

impedance. External resistors are recommended for

impedance matching and termination purposes.

The inputs and outputs can be dc-coupled, but for

best

performance,

the

input

and

output

common-mode voltage should be maintained at the

midpoint between the two supply pins. The output

common-mode voltage is controlled by the voltage

applied to VOCM. Left unterminated, VOCM is set to

midsupply by internal resistors. A 0.1-µF bypass

Figure 20. EVM Schematic: Designed for Use

capacitor should be placed between VOCM and

with Typical 50-

Ω RF Test Equipment

ground to reduce common-mode noise. The input

common-mode voltage defaults to midrail when left

unconnected.

For

voltages

other

than

midrail,

VOCMmust be biased by external means. VIN+ and

VIN– both require a nominal 30-µA bias current for

proper operation. Therefore, ensure equal input

impedance at each input to avoid generating an offset

voltage that varies with gain.

Voltage applied from VG– to VG+ controls the gain of

the part with 38.8-dB/V gain slope. The input can be

differential or single ended. VG– must be maintained

within –0.6 V and +0.8 V of VS–for proper operation.

The negative gain input should typically be tied

Figure 21. AC-Coupled Single-Ended Input with

directly to the negative power supply.

AC-Coupled Differential Output

VCL+ and VCL– are inputs that limit the output voltage

swing of the amplifier. The voltages applied set an

absolute limit on the voltages at the output. Input

voltages at VCL+ and VCL– clamp the output, ensuring

that neither output exceeds those values.

The power-down input is a TTL compatible input,

referenced to the negative supply voltage. A logic low

puts

the

THS7530

power-saving

mode.

power-down mode the part consumes less than 1-mA

current, the output goes high impedance, and a high

amount of isolation is maintained between the input

and output.

Figure 22. AC-Coupled Differential Input with

Power-supply bypass capacitors are required for

AC-Coupled Differential Output

proper operation. A 6.8-µF tantalum bulk capacitor is

recommended if the amplifier is located far from the

power supply and may be shared among other

devices. A ceramic 0.1-µF capacitor is recommended

within 0.1-in of the device power pin. The ceramic

capacitors should be located on the same layer as

the amplifier to eliminate the use of vias between the

capacitors and the power pin.

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