CS2841B datasheet(5/6 Pages) CHERRY

5 / 6 page

former saturation in some power supplies, the internal

oscillator waveform provides the maximum duty cycle

clamp as programmed by the selection of OSC compo-

nents.

Setting the Oscillator

Oscillator timing capacitor, CT, is charged by VREF through

RT and discharged by an internal current source. During

the discharge time, the internal clock signal blanks out the

output to the Low state, thus providing a user selected

maximum duty cycle clamp. Charge and discharge times

are determined by the general formulas:

tc = RTCT ln

td = RTCT ln

Substituting in typical values for the parameters in the

above formulas:

VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA

tc ≈ 0.5534RTCT

td = RTCT ln

The frequency and maximum duty cycle can be deter-

mined from the Typical Performance Characteristic

graphs.

Grounding

High peak currents associated with capacitive loads neces-

sitate careful grounding techniques. Timing and bypass

capacitors should be connected close to Gnd pin in a sin-

gle point ground.

The transistor and 5kΩ potentiometer are used to sample

the oscillator waveform and apply an adjustable ramp

to Sense.

)

2.3 - 0.0083 RT

4.0 - 0.0083 RT

(

)

VREF - IdRT - Vlower

VREF - IdRT - Vupper

(

)

VREF - Vlower

VREF - Vupper

(

VREF

OSC

Gnd

Circuit Description: continued

VOSC

Internal Clock

LARGE RT (≈10kΩ)

VOSC

Internal Clock

SMALL RT (≈700kΩ)

Sawtooth Mode

Triangular Mode

Vupper

Vlower

VCC

Switch

Current

EA Output

OSC

RESET

Figure 2: Timing Diagram for key CS2841B parameters

Figure 3: Oscillator Timing Network and parameters

Timing parameters

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