Typical Performance Characteristics

150

125

100

75

50

25

0

0

2000

4000

6000

8000

10000

12000

14000

16000

Load Capacitance (pF)

0.10

0.05

0

−0.05

−0.10

−0.15

−0.20

1.325 1.375 1.425 1.475 1.525 1.575 1.625 1.675 1.725 1.775 1.825 1.875 1.925 1.975 2.025 2.075

DAC Output Voltage Setting (V)

Figure 4: Percent Output Error vs. DAC Output

Figure 1: Gate(H) and Gate(L) Falltime vs. Load Capacitance.

150

125

100

75

50

25

0

0

2000

4000

6000

8000

10000

12000

14000

16000

Load Capacitance (pF)

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

−0.05

−0.10

−0.15

−0.20

−0.25

2.125 2.225 2.325 2.425 2.525 2.625 2.725 2.825 2.925 3.025 3.125 3.225 3.335 3.425 3.525

DAC Output Voltage Setting (V)

Figure 2: Gate(H) and Gate(L) Risetime vs. Load Capacitance.

6

Application Information

erated by the ESR of the output capacitors. This ramp is

proportional to the AC current through the main inductor

and is offset by the value of the DC output voltage. This

control scheme inherently compensates for variation in

either line or load conditions, since the ramp signal is gen-

erated from the output voltage itself. This control scheme

differs from traditional techniques such as voltage mode,

which generates an artificial ramp, and current mode,

which generates a ramp from inductor current.

Reference

Voltage

C

–

E

+

–

Ramp Signal

Output

Voltage

Feedback

Error

Signal

GATE(H)

GATE(L)

Error

Amplifier

COMP

PWM

Comparator

Theory Of Operation

0.10

0.05

0

−0.05

−0.10

−0.15

0

20

40

60

80

100

120

Junction Temperature (°C)

Figure 3: DAC Output Voltage vs. Temperature,

DAC Code = 00001.

Figure 5: Percent Output Error vs. DAC Output