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DS1866Z 데이터시트(PDF) 5 Page - Dallas Semiconductor |
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DS1866Z 데이터시트(HTML) 5 Page - Dallas Semiconductor |
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5 / 5 page ![]() DS1866 5 of 5 102199 NOTES: 1. All voltages are referenced to ground. 2. For VCC = 5V ± 10% maximum VIL = +0.8V. For VCC 3.0 ± 10% VIL = +0.6V. For VCC =2.7 volts VIH =2.0 volts minimum. 3. Resistor input voltages cannot go below ground or exceed VCC by the amounts as shown in the table. 4. Maximum current specifications are based on the change rate of the parallel port inputs P0, P1, and P2. 5. Standby current specifications apply when P0, P1, P2 logic inputs are driven within the specified VIH or VIL levels. 6. Valid at 25 °C only. 7. The end-to-end resistance tolerance of the DS1866 can be expected to shift with temperature. However, this change will not exceed ±20% of the nominal resistor value of the part. 8. Absolute tolerance is used to compare measured wiper voltage versus expected wiper voltage as determined by wiper position. The DS1866 is specified to provide an absolute tolerance of ±1.0 dB. 9. Tap-to-tap tolerance is used to determine the change in voltage between successive tap positions. The DS1866 is specified to provide a tap-to-tap tolerance specification of ±1.0 dB. 10. -3 dB cutoff frequency characteristic for the DS1866 is 1 MHz. 11. Capacitance values apply at 25°C. 12. This specification refers to the time difference between parallel port input changes to stabilize a wiper transition. DS1866 ORDERING INFORMATION ORDERING NUMBER PACKAGE OPERATING TEMPERATURE VERSION DS1866 8L DIP -40°C TO +85°C 10k Ω DS1866Z 8L SOIC (150-MIL) -40°C TO +85°C 10k Ω |
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