DS1985

20 of 25

(Figure 11) should be applied for 480

µs, after which the bus master returns the data line to an idle high

state controlled by the pullup resistor. Note that due to the high voltage programming requirements for

any 1-Wire EPROM device, it is not possible to multidrop non-EPROM based 1-Wire devices with the

DS1985 during programming. An internal diode within the non-EPROM based 1-Wire devices will

attempt to clamp the data line at approximately 8 volts and could potentially damage these devices.

INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 9

480

µs ≤ t

∞ *

480

µs ≤ t

∞ (includes recovery time)

15

µs ≤ t

µs

60

µs ≤ t

µs

∗ In order not to mask interrupt signaling by other devices on the 1-Wire bus, t

be less than 960

µs.

READ/WRITE TIMING DIAGRAM Figure 10

Write-1 Time Slot

60

µs ≤ t

µs

1

µs ≤ t

µs

1

µs ≤ t

∞

RESISTOR

MASTER

RESISTOR

MASTER

DS1985