ZLED7000

40V LED Driver with Internal Switch

Data Sheet

August 12, 2010

© 2010 Zentrum Mikroelektronik Dresden AG — Rev. 1.1

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the

prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.

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2.3.2

PWM Control

using an external PWM signal as the control signal applied to the ADJ pin. This control signal must be capable

of driving the ZLED7000’s internal 500kΩ pull-up resistor. See Figure 2.1 for an illustration. The minimum

signal voltage range is 0V to 1.8V; the maximum voltage range is 0V to 5V. See Table 1.3 for the

current control or proper operation of the ZLED7000.

Figure 2.1

Directly Driving ADJ Input with a PWM Control Signal

7000

ZLED

GND

ADJ

1.8V to 5V

0V

PWM

2.3.3

External DC Voltage Control of Output Current

clamped at its maximum (100%).

Figure 2.2

External DC Control Voltage at ADJ Pin

ADJ

GND

ZLED7000

DC

S

ADJ

DC

_

OUT

R

V

079

.

0

I





(2)

Where