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AT25DF321A 데이터시트(PDF) 44 Page - List of Unclassifed Manufacturers |
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AT25DF321A 데이터시트(HTML) 44 Page - List of Unclassifed Manufacturers |
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44 / 53 page ![]() 44 3686F–DFLASH–1/2014 AT25DF321A Notes: 1. Not 100% tested (value guaranteed by design and characterization) 2. 15pF load at frequencies above 70MHz, 30pF otherwise 3. Only applicable as a constraint for the Write Status Register Byte 1 command when SPRL = 1 Note: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles 2. Not 100% tested (value guaranteed by design and characterization) 14.8 Input Test Waveforms and Measurement Levels tEDPD (1) Chip Select High to Deep Power-Down 1 µs tRDPD (1) Chip Select High to Standby Mode 30 µs tRST Reset Time 30 µs 14.6 Program and Erase Characteristics Symbol Parameter Min Typ Max Units tPP (1) Page Program Time (256-Bytes) 1.0 3.0 ms tBP Byte Program Time 7µs tBLKE (1) Block Erase Time 4-Kbytes 50 200 ms 32-Kbytes 250 600 64-Kbytes 400 950 tCHPE (1)(2) Chip Erase Time 25 40 sec tSUSP Suspend Time Program 10 20 µs Erase 25 40 tRES Resume Time Program 10 20 µs Erase 12 20 tOTPP (1) OTP Security Register Program Time 200 500 µs tWRSR (2) Write Status Register Time 200 ns 14.7 Power-up Conditions Symbol Parameter Min Max Units tVCSL Minimum VCC to Chip Select Low Time 70 µs tPUW Power-up Device Delay Before Program or Erase Allowed 10 ms VPOR Power-on Reset Voltage 1.5 2.5 V 14.5 AC Characteristics – All Other Parameters (Continued) Symbol Parameter Min Max Units AC DRIVING LEVELS AC MEASUREMENT LEVEL 0.1V CC V CC/2 0.9V CC tR, tF < 2 ns (10% to 90%) |
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