8

AT45DB321D [DATASHEET]

3597T–DFLASH–11/2013

5.5

Block Erase

A block of eight pages can be erased at one time. This command is useful when large amounts of data have to be written into

the device. This will avoid using multiple page erase commands. To perform a block erase for the standard DataFlash page size

(528-bytes), an opcode of 50H must be loaded into the device, followed by three address bytes comprised of 1 don’t care bit,

10 page address bits (PA12-PA3), and 13 don’t care bits. The 10 page address bits are used to specify which block of eight

pages is to be erased. To perform a block erase for the binary page size (512 bytes), the 50H opcode must be loaded into the

device, followed by three address bytes consisting of 2 don’t care bits, 10 page address bits (A21 - A12), and 12 don’t care bits.

The 10 page address bits are used to specify which block of eight pages is to be erased. When a low-to-high transition occurs

on the CS pin, the part will erase the selected block of eight pages. The erase operation is internally self-timed, and should take

Table 5-1.

Block Erase Addressing

5.6

Sector Erase

The sector erase command can be used to individually erase any sector in the main memory. There are 64 sectors, and only

one sector can be erased at a time. To perform a sector 0a or sector 0b erase for the standard DataFlash page size (528 bytes),

an opcode of 7CH must be loaded into the device, followed by three address bytes comprised of 1 don’t care bit, 10 page

address bits (PA12 - PA3), and 13 don’t care bits. To perform a sector 1-63 erase, the 7CH opcode must be loaded into the

device, followed by three address bytes comprised of 1 don’t care bit, 6 page address bits (PA12 - PA7), and 17 don’t care bits.

To perform a sector 0a or sector 0b erase for the binary page size (512 bytes), an opcode of 7CH must be loaded into the

device, followed by three address bytes comprised of 2 don’t care bits, 10 page address bits (A21 - A12), and 12 don’t care bits.

To perform a sector 1-63 erase, the 7CH opcode must be loaded into the device, followed by three address bytes comprised of

2 don’t care bits, 6 page address bits (A21 - A16), and 16 don’t care bits. The page address bits are used to specify any valid

address location within the sector to be erased. When a low-to-high transition occurs on the CS pin, the part will erase the

the status register and the RDY/BUSY pin will indicate that the part is busy.

PA12/

A21

PA11/

A20

PA10/

A19

PA9/

A18

PA8/

A17

PA7/

A16

PA6/

A15

PA5/

A14

PA4/

A13

PA3/

A12

PA2/

A11

PA1/

A10

PA0/

A9

Block

0

0

0

0

0

0

0

0

0

0

X

X

X

0

0

0

0

0

0

0

0

0

0

1

X

X

X

1

0

0

0

0

0

0

0

0

1

0

X

X

X

2

0

0

0

0

0

0

0

0

1

1

X

X

X

3

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

●

1

1

1

1

1

1

1

1

0

0

X

X

X

1020

1

1

1

1

1

1

1

1

0

1

X

X

X

1021

1

1

1

1

1

1

1

1

1

0

X

X

X

1022

1

1

1

1

1

1

1

1

1

1

X

X

X

1023