ACT410

Rev 3, 27-Feb-14

- 10 -

www.active-semi.com

Copyright © 2014 Active-Semi, Inc.

Active-Semi Proprietary―For Authorized Recipients and Customers

ActivePSR

TYPICAL APPLICATION CONT’D

Design Example

The design example below gives the procedure for

a DCM fly back converter using an ACT410. Refer

to Application Circuit Figure 2, the design for an

adapter application starts with the following

specification:

The operation for the circuit shown in Figure 1 is as

follows: the rectifier bridge BD1 and the capacitor

C1/C2 convert the AC line voltage to DC. This

voltage supplies the primary winding of the

transformer T1 and the startup resistor R7/R8 to

VDD pin of ACT410 and C4. The primary power

current path is formed by the transformer’s primary

winding, the mosfet, and the current sense resistor

R9. The resistors R3, R2, diode D2 and capacitor

C3 create a snubber clamping network that protects

Q1 from voltage spike from the transformer primary

winding

leakage

inductance.

The

network

consisting of capacitor C4, diode D3 and resistor

R4 provides a VDD supply voltage for ACT410 from

the auxiliary winding of the transformer. The resistor

R4 is optional, which filters out spikes and noise to

makes VDD more stable. C4 is the decoupling

capacitor of the supply voltage and energy storage

component for startup. During power startup, the

current charges C4 through startup resistor R7/R8

from the rectified high voltage. The diode D4 and

the capacitor C7/L2/C6 rectify filter the output

voltage. The resistor divider consists of R5 and R6

programs the output voltage.

Since a bridge rectifier and bulk input capacitors are

used, the resulting minimum and maximum DC

input voltages can be calculated:

2х10µF electrolytic capacitors.

The maximum duty cycle is set to be 35% at low

line voltage 85VAC and the circuit efficiency is

estimated to be 75%. Then the maximum average

input current is:

The maximum input primary peak current:

The primary inductance of the transformer:

The maximum primary turns on time:

The ringing periods from primary inductance with

mosfet Drain-Source capacitor:

Design only an half ringing cycle at maximum load

in minimum low line, so secondly reset time:

Base on conservation of energy and transformer

transform identity, the primary to secondary turns

V

100

F

10

2

75

.

0

)

ms

5

.

3

47

2

1

(

5

.

10

2

85

2

C

)

t

f

2

1

(

P

2

V

2

V

2

IN

C

L

OUT

2

MIN

_

INAC

MIN

_

INDC

≈

-

-

-

μ

η

×

×

×

×

×

×

=

×

=

(3)

V

375

)

V

265

(

2

V

2

V

AC

AC

)

MAX

(

IN

DC

)

MAX

(

IN

=

×

=

×

=

(4)

mA

874

35

.

0

153

2

D

L

2

I

MAX

N

I

LIM

=

×

=

×

=

(6)

mH

37

.

0

k

110

mA

874

35

.

0

100

f

I

D

V

L

s

LIM

max

MIN

_

INDC

p

=

×

×

=

×

=

(7)

s

23

.

3

100

mA

874

mH

37

.

0

V

I

L

T

MIN

_

INDC

LIM

p

MAX

_

ON

μ

=

×

=

=

(8)

s

25

.

1

PF

100

%)

7

1

(

mH

37

.

0

14

.

3

2

C

L

2

T

MAX

_

DS

MAX

_

p

MAX

_

RINGING

μ

π

=

×

+

×

×

×

=

=

(9)

s

24

.

5

s

25

.

1

5

.

0

s

23

.

3

kHz

110

/

1

T

5

.

0

T

T

T

MAX

_

RINGING

MAX

_

ON

SW

RST

μ

μ

μ

=

×

=

=

-

-

-

-

(10)

31

.

11

45

.

0

5

100

24

.

5

23

.

3

V

V

V

T

T

N

N

D

OUT

MIN

_

IN

RST

ON

S

P

=

+

×

=

+

×

=

(11)

28

.

2

45

.

0

5

45

.

0

12

V

V

'

V

V

N

N

D

OUT

D

DD

S

A

=

+

+

=

+

+

=

(12)

mA

153

75

.

0

100

3

.

2

12

V

I

V

I

MIN

_

INDC

CC

_

OUT

OUT

MAX

_

IN

=

×

×

=

×

×

=

η

(5)

Input Voltage Range

90VAC - 265VAC, 50/60Hz

10W

5V

2A

2-2.6A

System Efficiency CV,

η

0.75