PI6C2402

Phase-Locked Loop Clock Driver

2

PS8418I

11/13/08

Recommended Operating Conditions

Symbol

Test Conditions

Temperature

Min.

Max.

Units

Supply Voltage

Commercial

3.0

3.6

V

Industrial

3.135

3.465

High Level input voltage

2.0

Low Level input voltage

0.8

Input voltage

0

Operating free-air temperature

Commercial

0

70

ºC

Industrial

-40

85

Symbol

Test Conditions

Min.

Max.

Units

Input voltage range

-0.5

V

Output voltage range

-0.5

VI_DC

DC input voltage

-0.5

5.0

IO_DC

DC output current

100

mA

Power

Maximum power dissipation at TA = 55ºC in still air

1.0

W

Storage temperature

-65

150

ºC

Pin Functions

Name

Number

Type

Description

CLK_IN

1

I

Reference Clock inptu, CLK_IN allows spread spectrum clock input

2

Power

Analog Power

AGND

3

Ground

Analog Ground

CLK_OUT

4

O

Clock Output. The output provides low-skew copies of CLK_IN and has an embedded

series-damping resistor.

S5

I

Control Input S. S is used to bypass the PLL for test purposes. When S is strapped to

ground, PLL is bypassed and CLK_IN is buffered directly to the device outputs

GND

6

Ground

Ground

7

Power

Power Supply

FB_IN

8

I

Feedback input. FB_IN provides the feedback signal to the internal PLL.

Note:

1.

Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.

08-0298