IO137RSB2 datasheet(15/210 Pages) MICROSEMI

15 / 210 page

ProASIC3 Flash Family FPGAs

Re vi s i on 15

2 - 10

Power Consumption of Various Internal Resources

Table 2-14 • Different Components Contributing to Dynamic Power Consumption in ProASIC3 Devices

Parameter

Definition

Device Specific Dynamic Contributions

(µW/MHz)

PAC1

Clock contribution of a Global Rib

14.50 12.80 12.80 11.00 11.00

9.30

9.30 9.30

PAC2

Clock contribution of a Global Spine

2.48

1.85

1.35

1.58

0.81

0.41 0.41

PAC3

Clock contribution of a VersaTile row

0.81

PAC4

Clock contribution of a VersaTile used as a

sequential module

0.12

PAC5

First contribution of a VersaTile used as a

sequential module

0.07

PAC6

Second contribution of a VersaTile used as a

sequential module

0.29

PAC7

Contribution of a VersaTile used as a

combinatorial Module

0.29

PAC8

Average contribution of a routing net

0.70

PAC9

Contribution of an I/O input pin (standard

dependent)

See Table 2-8 on page 2-6 through

Table 2-10 on page 2-7.

PAC10

Contribution of an I/O output pin (standard

dependent)

See Table 2-11 on page 2-8 through

Table 2-13 on page 2-9.

PAC11

Average contribution of a RAM block during a

read operation

25.00

PAC12

Average contribution of a RAM block during a

write operation

30.00

PAC13

Dynamic contribution for PLL

2.60

Note:

*For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi Power

spreadsheet calculator or SmartPower tool in Libero SoC software.

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