PM8803 datasheet(9/34 Pages) STMICROELECTRONICS

9 / 34 page

PM8803

Pin descriptions and connection diagrams

Doc ID 018559 Rev 2

9/34

Pin descriptions and connection diagrams

Figure 5.

Pin connections (top view)

Table 2.

Pin descriptions

Pin#

Name

Function

1CTL

Input of the Pulse Width Modulator.

CTL pull-up to VB is provided by an external resistor which may be used to

bias an opto-coupler transistor.

2VB

5 V, up to 10 mA Bias Rail.

This reference voltage can be used to bias an opto-coupler transistor.

3CS

Current sense input for current mode control and overcurrent protection.

Current sensing is accomplished using a dedicated current sense

comparator. If the CS pin voltage exceeds 0.5 V, the GAT1 pin switches low

for cycle-by-cycle current limiting. CS is internally held low for 60 ns after

GAT1 switches high to blank leading edge current spikes.

4RTN1

Power ground for the GAT1 driver.

This pin must be connected to RTN2 and ARTN.

5GAT1

Main gate driver output of the PWM controller.

DC-DC converter gate driver output with 1 A peak sink-source current

capability. (5 ohm typ MOSFETs).

6VC

Output of the internal high-voltage regulator.

When the auxiliary transformer winding (if used) raises the voltage on this

pin above the 8 V typ. regulation set point, the internal regulator will

shutdown, reducing the internal power dissipation. Filter this pin with a 1µF

typ. connected to ground.

7GAT2

Secondary gate driver output.

AUX gate driver output for active clamp or synchronous rectification

designs. 1 A peak sink-source current capability (5 ohm typ. MOSFETs).

8ARTN

Analog PWM supply ground.

RTN for sensitive analog circuitry including the SMPS current limit amplifier.

DCCL

FRS

T2P

RTN1

CTL

DET

CLS

ARTN

GAT2

GAT1

VSS

RTN2

VDD

AM045095v1

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