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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LP55281RL/NOPB 데이터시트(PDF) 7 Page - Texas Instruments |
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LP55281RL/NOPB 데이터시트(HTML) 7 Page - Texas Instruments |
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7 / 35 page  LP55281 www.ti.com SNVS458B – JUNE 2007 – REVISED JUNE 2007 Electrical Characteristics (1) (2) (continued) Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the operating ambient temperature range (- 30°C < TA < +85°C). Unless otherwise noted, specifications apply to the LP55281 Block Diagram with: VDD1 = VDD2 = 3.6V, VDDIO = 2.8V, CV DD = C VDDIO = 100 nF, COUT = CIN = 10 µF, CVDDA= 1 µF, CREF = 100 nF, L1 = 4.7 µH, RRGB = 8.2 kΩ and RRT = 82 k Ω (3). ILEAKAGE R1-4, G1-4, B1-4 pin leakage current 5.5V at measured pin 0.1 1 µA IRGB Maximum Recommended Sink Current Limited with external resistor RRGB 40 mA Accuracy @ 15 mA RRGB = 8.2 kΩ ± 1 % ± 5 % Current mirror ratio (6) 1 : 100 RGB1-4 current mismatch IRGB = 15 mA ± 5 % fPWM RGB switching frequency Accuracy defined by internal fPWM oscillator, frequency value selectable AUDIO SYNCHRONIZATION INPUT ELECTRICAL CHARACTERISTICS Symbol Parameter Condition Min Typ Max Units ZIN Input Impedance of ASE1, ASE2 (6) 10 15 k Ω AIN ASE1, ASE2 Audio Input Level Range Min input level needs maximum gain; 0 1600 mV (peak-to-peak) Max input level for minimum gain ALED DRIVER ELECTRICAL CHARACTERISTICS Symbol Parameter Condition Min Typ Max Units Ileakage Leakage current VALED = 5.5V 0.03 1 µA IALED ALED current tolerance IALED set to 13.2 mA 11.9 13.2 14.5 mA -10 +10 % LOGIC INTERFACE CHARACTERISTICS Symbol Parameter Condition Min Typ Max Units Logic Input SS/SDA, SI/A0, SCK/SCL, IF_SEL VIL Input Low Level 0.2*VDDIO V VIH Input High Level 0.8*VDDIO V II Logic Input Current -1.0 1.0 µA fSCK/SCL Clock Frequency I2C 400 kHz SPI Mode, 13 MHz VDDIO > 1.8V (7) SPI Mode, 5 MHz 1.65V ≤ VDDIO < 1.8V Logic Input NRST VIL Input Low Level 0.5 V VIH Input High Level 1.2 V II Logic Input Current -1.0 1.0 µA tNRST Reset Pulse Width 10 µs Logic Output SO VOL Output Low Level ISO = 3 mA 0.3 0.5 V VDDIO > 1.8V ISO = 2 mA 0.3 0.5 1.65V ≤ VDDIO < 1.8V VOH Output High Level ISO = -3 mA VDDIO - VDDIO - V VDDIO > 1.8V 0.5 0.3 ISO = -2 mA VDDIO - VDDIO - 1.65V ≤ VDDIO < 1.8V 0.5 0.3 IL Output Leakage Current VSO = 2.8V 1.0 µA Logic Output SDA VOL Output Low Level ISDA = 3 mA 0.3 0.5 V (7) Data guaranteed by design Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LP55281 |
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