Application information

ST1S32

18/29

Doc ID 023246 Rev 1

Equation 22

For the ceramic (MLCC) capacitor the capacitive component of the ripple dominates the

resistive one. While for the electrolythic capacitor the opposite is true.

As the compensation network is internal, the output capacitor should be selected in order to

have a proper phase margin and then a stable control loop.

The equations of Section 4.2 help to check loop stability, given the application conditions,

the value of the inductor and the output capacitor.

In Table 8 some capacitor series are listed.

5.4

Thermal dissipation

The thermal design is important to prevent the thermal shutdown of the device if junction

temperature goes above 150 °C. The three different sources of loss within the device are:

a)

Equation 23

where D is the duty cycle of the application. Note that the duty cycle is theoretically given by

the regulator.

b)

switching losses due to high-side Power MOSFET turn-on and off; these can be

calculated as:

Table 8.

Output capacitors

Manufacturer

Series

Cap value (

μF)

Rated voltage (V)

ESR (m

Ω)

Murata

GRM32

22 to 100

6.3 to 25

< 5

GRM31

10 to 47

6.3 to 25

< 5

Panasonic

ECJ

10 to 22

6.3

< 5

EEFCD

10 to 68

6.3

15 to 55

Sanyo

TPA/B/C

100 to 470

4 to 16

40 to 80

TDK

C3225

22 to 100

6.3

< 5

ΔV

OUT

ESR

ΔI

MAX

⋅

ΔI

MAX

8C

OUT

f

SW

⋅⋅

------------------------------------------

+

=

P

COND

R

HS

I

OUT

2

DR

LS

I

OUT

2

1D

–

()

⋅⋅

+

⋅⋅

=