MB89913 datasheet(39/53 Pages) FUJITSU

39 / 53 page

MB89910 Series

7. Notes on Using A/D Converter

• Input impedance of the analog input pins

The A/D converter used for the MB89910 series contains a sample hold circuit as illustrated below to fetch

analog input voltage into the sample hold capacitor for eight instruction cycles after activating A/D conversion.

For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage

might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output

impedance of the external circuit low. If a higher accurancy is required, set the output impedance in this series

to 2 k

Ω or less.

Note that if the impedance cannot be kept low output impedance, it is recommended either to use the software

to continuously activate the A/D converter for simulating longer sampling time or to connect an external

capacitor of approx. 0.1

µF to the analog input pin.

• Error

The smaller the | AVR – AVSS |, the greater the error would become relatively.

1111

1110

•

0000

0010

0000

0001

0000

VOT

VNT V(N + 1)T

VFST

Digital output

(1 LSB

× N + VOT)

Analog input

Actual conversion value

Theoretical conversion value

Linearity error

1 LSB

1 LSB =

AVR

256

Linearity error =

Differential linearity error =

Total error =

VNT – (1 LSB

× N + VOT)

1 LSB

V( N + 1 ) T – VNT

1 LSB

– 1

VNT – (1 LSB

× N + 0.5 LSB)

Sample hold circuit

Analog channel selector

Close for 8 instruction cycles after activating

A/D conversion.

If the output

impedance of external

circuit is high

, it is

recommended to

connect an external

capacitor of approx.

0.1

µF.

Analog input pin

Comparator

R = 6 k

Ω

C = 33 pF

• Analog Input Equivalent Circuit

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