MB89151APF datasheet(22/52 Pages) FUJITSU

22 / 52 page

MB89150/150A Series

The RP indicates the address of the register bank currently in use. The relationship between the pointer contents

and the actual address is based on the conversion rule illustrated below.

The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and

bits for control of CPU operations at the time of an interrupt.

H-flag:

Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared

otherwise. This flag is for decimal adjustment instructions.

I-flag:

Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0

when reset.

IL1, 0:

Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is

higher than the value indicated by this bit.

N-flag:

Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0.

Z-flag:

Set when an arithmetic operation results in 0. Cleared otherwise.

V-flag:

Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does

not occur.

C-flag:

Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise.

Set to the shift-out value in the case of a shift instruction.

IL1

IL0

Interrupt level

High-low

High

Low = no interrupt

Rule for Conversion of Actual Addresses of the General-purpose Register Area

“0”

↓

A15

“0”

↓

A14

“0”

↓

A13

“0”

↓

A12

“0”

↓

A11

“0”

↓

A10

“0”

↓

“1”

↓

Generated addresses

Lower OP codes

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