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AS8506C 데이터시트(PDF) 39 Page - ams AG |
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AS8506C 데이터시트(HTML) 39 Page - ams AG |
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39 / 94 page ![]() ams Datasheet: 2014-Jun-23 [v1-00] AS8506C – 39 Devic e I n te r f ac e A 4-wire SPI is used to communicate with the device. Pins CS, SCLK, SDI, and SDO are used for SPI interface. Serial Peripheral Interface The Serial Peripheral Interface (SPI) provides the communication link with the microcontroller. The SPI is configured for half-duplex data transfer. The SPI in AS8506C provides access to the status registers, control registers and test registers. The SPI is also used to enter into test and OTP modes. This interface is only Slave interface and only Master can initiate the SPI operation. The SPI also supports block data transfer where sequential register data can be accessed with single SPI command. The SPI can work on both the clock polarities. The polarity of the clock is dependent on the value of SCLK at the falling edge of CS. At the falling edge of CS, • If SCLK is “1”, then the SPI is negative edge triggered. • If the SCLK is “0”, then SPI is positive edge triggered logic. see Figure 30 for more details. Figure 30: SPI Clock Polarity Table CS SCLK Description ↓ Low Serial data is transferred at rising edge and sampled at falling edge of SCLK. ↓ High Serial data is transferred at falling edge and sampled at rising edge of SCLK. Device Interface |
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