HT6221/HT6222

7

March 2, 2000

The algorithm rule of the address codes

(A0~A15) can be selected by mask option.

In this case, the 16-bit on-chip MASK ROM

(ROM1 and ROM2) are available, and the

value of ROM1 (8 bits) and ROM2 (8 bits) are

decided by one MASK LAYER. The current

value of ROM1 and ROM2 are both "00H".

The A0~A7 are set by logical OR between the

external switch S0~S7 and the ROM1. The

A8~A15 equal some bits inverted to A0~A7,

the inversion are decided by Logical OR be-

tween the external switch S8~S15 and the

ROM2.

For example:

The following is an illustration of these rules in

selecting the address codes (A0~A15).

1

0

0

0

1

1

0

0

1

0

1

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

1

1

0

0

A0 A 1 A2 A3 A4 A 5 A6 A7

Co m p l e m e n t

1 : n o n in v e r s io n

0: i nv er s i on

S 0 ~ S 7 OR R OM 1

S8 ~ S 1 5 O R R O M 2

1

0

1

0

0

1

0

0

1

1

0

1

0

1

1

1

E x t e r nal S w i t c h S 0 ~ S 15:

O n - c hi p R O M 1 , R O M 2 :

A0 ~ A 7 :

A8 ' ~ A1 5 ' :

A8 ~ A 1 5 :

bi t 0

bi t 7 bi t 0

bi t 7

H T 6221/ H T 6222

AI N

1N 4148 ´ 8

S8

S7

S6

S5

S4

S3

S2

S1

S0

S9

S1 0

S 1 1

S1 2

S 1 3

S1 4

S 1 5

C1

C2

C3

C4

C5

C6

C7

C8

( S w i tc h O p e n : 0 , S w i t c h C l o s e : 1 )

200k W´ 8