| 전자부품 데이터시트 검색엔진 |
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HT82K68 데이터시트(PDF) 16 Page - Holtek Semiconductor Inc |
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HT82K68 데이터시트(HTML) 16 Page - Holtek Semiconductor Inc |
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16 / 40 page ![]() HT82K68E 16 August 8, 2000 Preliminary Label Bits Function ¾ 0~3 Unused bits, read as "0" TON 4 To enable/disable timer counting (0= disabled; 1= enabled) ¾ 5 Unused bits, read as "0" TM0 TM1 6 7 10= Timer mode (internal clock) TMRC register To enable the counting operation, the timer ON bit (TON; bit 4 of TMRC) should be set to 1. In the case of timer counter OFF condition, writing data to the timer counter preload reg- ister will also reload that data to the timer counter. But if the timer counter is turned on, data written to it will only be kept in the timer counter preload register. The timer coun- ter will still operate until overflow occurs. When the timer counter (reading TMR) is read, the clock will be blocked to avoid errors. As clock blocking may results in a counting error, this must be taken into consideration by the program- mer. Input/output ports There are 32 bidirectional input/output lines in the HT82K68E, labeled from PA to PE, which are mapped to the data memory of [12H], [14H], [16H], [18H] and [1AH] respectively. All these I/O ports can be used for input and output opera- tions. For input operation, these ports are non-latching, that is, the inputs must be ready at the T2 rising edge of instruction MOV A,[m] (m=12H, 14H, 16H, 18H or 1AH). For output op- eration, all data is latched and remains un- changed until the output latch is rewritten. S yst e m C l o ck/ 4 TM 1 TM 0 TM 1 TM 0 TO N P u l s e W i dt h M eas ur e m ent M ode C ont r o l T i m e r C o unt er P r el oad R e gi s t er Ti m e r C ount e r Da t a B u s R e l oad O v er f l ow t o I nt er r u p t Timer counter |
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