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HT9580 데이터시트(PDF) 30 Page - Holtek Semiconductor Inc |
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HT9580 데이터시트(HTML) 30 Page - Holtek Semiconductor Inc |
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30 / 63 page ![]() HT9580 30 April 28, 2000 Preliminary SPI SPEED register (write only) Address Register Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 State on POR 0033H SPI-SPEED SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 0000 0000 The register will determine the SCK clock frequency of SPI. When SPEED register are 00H, the SCK clock output is high. The value of the frequency divider, ranging from 1 (SPEED=01H)~255 (SPEED=FFH). If SPEED=00H, the SCK output will be disabled. X1- c l o c k 8- bi t S P E E D C oun t e r SP I C o n t r o l SP I SC K SPI output buffer register (write only) Address Register Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 State on POR 0034H SPI-OUT3 D7 D6 D5 D4 D3 D2 D1 D0 0000 0000 0035H SPI-OUT2 D7 D6 D5 D4 D3 D2 D1 D0 0000 0000 0036H SPI-OUT1 D7 D6 D5 D4 D3 D2 D1 D0 0000 0000 0037H SPI-OUT0 D7 D6 D5 D4 D3 D2 D1 D0 0000 0000 The SPI-OUT3~0 are used when transmitting data on the serial bus. Only valid data write to the reg- ister SPI-OUT3~0 and "START" initiating will begin the SPI data transmission from HT9580 to FLEXTM decoder. After completion of the 4-byte data transfer, the "SPIFG" status bit will be set and the internal signal ²REQST² will generate a falling edge signal for NMI. The bit7 of SPI-OUT3 is MSB and bit0 of SPI-OUT0 is LSB. SP I F G RE Q S T (N M I ) RE Q S T ( r egi s t er ) ST AR T ( r egi s t er ) Logi c H i gh SC K MO S I ( f r o m H T 95 80) SP I - O U T 3 ~ 0 SP I - I N 3 ~ 0 MI S O ( f r o m dec od er ) S S ( t o d ec oder ) SR D Y ( f r o m dec od er ) S P I pac k e t e x c h ange i ni t i at ed b y t he H T 9580 MS B MS B 2 2 1 1 LS B LS B |
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