HTG12G0 datasheet(13/31 Pages) HOLTEK

13 / 31 page

LCD driver output can be enabled or disabled

by setting PA2 without the influence of the re-

lated memory condition.

LCD driver output is enabled by setting PA2 as

“1”, and disabled by setting PA2 as “0”.

An example of an LCD driving waveform (1/8

duty and 1/5 bias) is shown below:

Oscillator circuit

Only one external resistor is required for the

HTG12G0 system clock.

The system clock is also used as the sound effect

clock, or internal frequency source of TIMER.

Another crystal oscillator is needed to be used

as the reference signal of LCD driving clock and

RTC interrupt clock source.

The HTG12G0 machine cycle consists of a se-

quence of 4 states numbered T1 to T4. Each

state lasts for one oscillator period. The ma-

chine cycle is 4.0

µs, if the system frequency is

up to 1.0MHz.

Input ports – PS, PP

Ports PS, PP are 4-bit input ports. These input

ports are configured as shown below:

All of these ports have internal pull-high resis-

tor determined by mask option.

Each bit of input ports PS, PP can be a trigger

source of HALT interrupt. That is also specified

by mask option. A transition from high to low

will make HTG12G0 wake-up.

RC and RTC oscillator

Input ports PS, PP

HTG12G0

14th May ’99

HTG12G0 데이터시트(PDF) 13 Page - Holtek Semiconductor Inc