AT90PWM2 datasheet(280/365 Pages) ATMEL

280 / 365 page

280

4317K–AVR–03/2013

AT90PWM2/3/2B/3B

25. Memory Programming

25.1

Program And Data Memory Lock Bits

The AT90PWM2/2B/3/3B provides six Lock bits which can be left unprogrammed (“1”) or can be

programmed (“0”) to obtain the additional features listed in Table 25-2. The Lock bits can only be

erased to “1” with the Chip Erase command.

Notes:

1. “1” means unprogrammed, “0” means programmed.

Notes:

1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.

2. “1” means unprogrammed, “0” means programmed

Table 25-1.

Lock Bit Byte

(1)

Lock Bit Byte

Bit No

Description

Default Value

–

1 (unprogrammed)

–

1 (unprogrammed)

BLB12

Boot Lock bit

1 (unprogrammed)

BLB11

Boot Lock bit

1 (unprogrammed)

BLB02

Boot Lock bit

1 (unprogrammed)

BLB01

Boot Lock bit

1 (unprogrammed)

LB2

Lock bit

1 (unprogrammed)

LB1

Lock bit

1 (unprogrammed)

Table 25-2.

Lock Bit Protection Modes

(1)(2)

Memory Lock Bits

Protection Type

LB Mode

LB2

LB1

No memory lock features enabled.

Further programming of the Flash and EEPROM is disabled in

Parallel and Serial Programming mode. The Fuse bits are

locked in both Serial and Parallel Programming mode.(1)

Further programming and verification of the Flash and

EEPROM is disabled in Parallel and Serial Programming mode.

The Boot Lock bits and Fuse bits are locked in both Serial and

Parallel Programming mode.(1)

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