GMS81024 datasheet(48/101 Pages) HYNIX

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4 - 10

4.2 TIMER

4.2.1 Timer operation mode

Timer consists of 16bit binary counter Timer0(T0), 8bit binary Timer1(T1), Timer2(T2),

Timer Data Register, Timer Mode Register (TM01, TM0, TM1, TM2) and control circuit.

Timer Data Register Consists of Timer0 High-MSB Data Register(T0HMD), Timer0 High-

LSB Data Register(T0HLD), Timer0 Low-MSB Data Register(T0LMD), Timer0 Low-LSB

Data Register(T0LLD), Timer1 High Data Register(T1HD), Timer1 Low Data

Any of the PS0~PS5, PS11 and external event input EC can be selected as clock source

for T0. Any of the PS0~PS3, PS7~PS10 can be selected as clock T1. Any of the

PS5~PS12 can be selected as clock source for T2.

Timer0

- 16-bit Interval Timer

- 16-bit Event Counter

- 16-bit Input Capture

- 16-bit rectangular-wave output

Timer1

- 8-bit Interval Timer

-8-bit rectangular-wave output

Timer2

- 8-bit Interval Timer

-8-bit rectangular-wave output

- Modulo-N Mode

- Single/Modulo-N Mode

- Timer Output Initial Value Setting

- Timer0~Timer1 combination Logic Output

- One Interrupt Generating Every 2nd Counter Overflow

Chapter 4. Peripheral Hardware

*Relevant Port Mode Register (PMR1 : 00C9H) value should be assigned for event counter,

rectangular-wave output and input capture mode.

GMS81024 데이터시트(PDF) 48 Page - Hynix Semiconductor