GMS90C320

OCT. 2000 Ver 1.2

9

CPU

The GMS90C320 is efficient both as a controller and as an arithmetic processor. It has extensive facilities for binary and BCD

arithmetic and excels in its bit-handling capabilities. Efficient use of program memory results from an instruction set con-

sisting of 44% one-byte, 41% two-byte, and 15% three-byte instructions. With a 12 MHz crystal, 58% of the instructions are

executed in 1.0

µs.

Special Function Register PSW

Bit

Function

CY

Carry Flag

AC

Auxiliary Carry Flag (for BCD operation)

F0

General Purpose Flag

RS1

0

0

1

1

RS0

0

1

0

1

Register Bank select control bits

OV

Overflow Flag

F1

General Purpose Flag

P

Parity Flag

Set/cleared by hardware each instruction cycle to indicate an odd/

even number of “one” bits in the accumulator, i.e. even parity.

MSB

LSB

Bit No.

76

543

21

0

CY

AC

F0

RS1

RS2

OV

F1

P

PSW