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ICS1523MLF 데이터시트(PDF) 19 Page - Integrated Circuit Systems

부품명 ICS1523MLF
상세설명  Video Clock Synthesizer with I2C Programmable Delay
PDF  21 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1523MLF 데이터시트(HTML) 19 Page - Integrated Circuit Systems

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Video Clock Synthesizer with I2C Programmable Delay
MDS 1523 Y
19
Revision 110905
Integrated Circuit Systems
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS1523
Note 1- VOL must not fall below the level given so that the correct value for IOUT can be maintained.
Note 2- Measured at 135MHz, 3.6 VDC, 0oC, 20 pF, with 75
Ω Termination
Note 3- Measured at 135MHz, 3.6 VDC, 0oC, 20 pF, Unterminated
Analog Input (HSYNC)
Input High Voltage
VIH
1.7
5.5
V
Input Low Voltage
VIL
VSS - 0.3
1.1
V
Digital Inputs (SDA, SCL, EXTFB, OSC, I2CADDR)
Input High Voltage
VIH
25.5
V
Input Low Voltage
VIL
VSS - 0.3
0.8
V
Input Hysteresis
-
0.2
0.6
V
POR Threshold
-
VSS
1.8
V
Voltage that resets
register values
SDA Digital Output
SDA Output Low Voltage
VOL
0.4
V
IOUT = 3ma
SDA Output High Voltage
VOH
6.0
V
Determined by
external Rset
resistor
PECL Outputs (CLK+, CLK-, CLK/2+, CLK/2-)
Output High Voltage
VOH
-VDD
V
IOUT=0
Maximum Output Frequency
FP MAX
-
250
MHz
VDDD = 3.3 V
Output Low Voltage *
VOL
1.0
-
V
IOUT =
Programmed Value
1
Duty Cycle
PDC
45
55
%
2
Transition Time - Rise
TPR
-1.0
ns
2
Transition Time - Fall
TPF
-1.2
ns
2
SSTL_3 Outputs (CLK, CLK/2, FUNC, LOCK/REF)
Output Resistance
RO
-80
Ω
1 V < VO < 2 V
Maximum Output Frequency
Fs MAX
-
150
MHz
VDDD = 3.3 V
Duty Cycle
SDC
45
55
%
3
Clock and FUNC
Transition Time - Rise
TCR
-1.6
ns
3
Clock and FUNC
Transition Time - Fall
TCF
-1.0
ns
3
LOCK/REF Transition Time -
Rise
TLR
-3.0
ns
3
LOCK/REF Transition Time - Fall
TLF
-2.0
ns
3
Parameter
Symbol
Min.
Max.
Units
Notes



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