Pin Description

PIN NUMBER

NAME

DESCRIPTION

1

OUT2

4mA Output.

2

OUT1

4mA Output.

3

OUT0

4mA Output

4

OUT9

4mA Output.

5

CPUCLK

4mA Output driven by Voltage Controlled Oscillator 1 (VC01). VC01 is controlled

by a 16 word ROM.

6

VSS

Ground for digital portion of chip.

7

DVDD

Plus supply for digital portion of chip.

8

STROBE

Input control for transparent latches associated with CPU (0-3) which select one of

16 values for CPUCLK. Holding STROBE high causes the latches to be transparent.

9

CPUSEL0

LSB CPUCLK address bit.

10

CPUSEL1

CPUCLK address bit.

11

CPUSEL2

CPUCLK address bit.

12

CPUSEL3

MSB CPUCLK address bit.

13

CLKIN

An alternative input for the reference clock. The crystal oscillator output and CLKIN

are gated together to generate the reference clock for the VCO’s. If CLKIN is used,

XTAL1 should be held high and XTAL2 left open. If the internal oscillator is used,

hold CLKIN high.

14

OUTPUTE

Pulling this line low tristates all outputs.

15

AVSS

Ground for analog portion of chip.

16

XTAL1

Input of internal crystal oscillator stage.

17

XTAL2

Output of internal crystal oscillator stage. This pin should have nothing connected

to it but one of the quartz crystal terminals.

18

AVDD

Positive supply for analog portion of chip.

19

OUT8

4mA Output.

20

OUT7

4mA Output. (Usually assigned as CPUCLK/2 for co-processor use.)

21

OUT6

4mA Output.

22

OUT5

4mA Output.

23

OUT4

4mA Output.

24

OUT3

4mA Output.

ICS2694

2