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ICS553M 데이터시트(PDF) 5 Page - Integrated Circuit Systems

부품명 ICS553M
상세설명  LOW SKEW 1 TO 4 CLOCK BUFFER
PDF  6 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS553M 데이터시트(HTML) 5 Page - Integrated Circuit Systems

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LOW SKEW 1 TO 4 CLOCK BUFFER
MDS 553 B
5
Revision 052501
Int egrat ed C i rcuit Syste ms q 525 R a ce S t r eet, San Jose, CA 95126 q t e l (40 8 ) 295 -9800 q
w w w. icst . c om
ICS553
AC Electrical Characteristics
VDD = 2.5V ±5%, Ambient Temperature 0 to +70
° C, unless stated otherwise
VDD = 3.3V ±5%, Ambient Temperature 0 to +70
° C, unless stated otherwise
VDD = 5V ±5%, Ambient Temperature 0 to +70
° C, unless stated otherwise
Notes: 1. With rail to rail input clock
2. Between any 2 outputs with equal loading.
3. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock
generators.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
0
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
1.5
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
1.5
ns
Propagation Delay
Note 1
3
ns
Output to output skew
Note 2
Rising edges at VDD/2
0
50
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
0
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
1.0
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
1.0
ns
Propagation Delay
Note 1
2.6
ns
Output to output skew
Note 2
Rising edges at VDD/2
0
50
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
0
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
0.7
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
0.7
ns
Propagation Delay
Note 1
2.5
ns
Output to output skew
Note 2
Rising edges at VDD/2
0
50
ps



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