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ICS8525 데이터시트(PDF) 1 Page - Integrated Circuit Systems

부품명 ICS8525
상세설명  LOW SKEW, 1-TO-4 LVCMOS-TO-LVHSTL FANOUT BUFFER
PDF  12 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS8525 데이터시트(HTML) 1 Page - Integrated Circuit Systems

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8525BG
www.icst.com/products/hiperclocks.html
REV. B JULY 27, 2001
1
Integrated
Circuit
Systems, Inc.
ICS8525
LOW SKEW, 1-TO-4
LVCMOS-TO-LVHSTL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8525 is a low skew, high performance
1-to-4 LVCMOS-to-LVHSTL fanout buffer and a
member of the HiPerClockS™ family of High
Performance Clock Solutions from ICS. The
ICS8525 has two selectable clock inputs that ac-
cept LVCMOS or LVTTL input levels and translate them to
1.8V LVHSTL levels. The clock enable is internally synchro-
nized to eliminate runt pulses on the outputs during asyn-
chronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS8525 ideal for those applications demanding
well defined performance and repeatability.
FEATURES
• 4 differential 1.8V LVHSTL outputs
• Selectable LVCMOS / LVTTL clock inputs for redundant
and multiple frequency fanout applications
• Maximum output frequency up to 266MHz
• Translates LVCMOS and LVTTL levels to 1.8V
LVHSTL levels
• Output skew: 35ps (maximum)
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.9ns (maximum)
• 3.3V core, 1.8V operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
HiPerClockS™
,&6
ICS8525
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm Package Body
G Package
Top View
GND
CLK_EN
CLK_SEL
CLK0
nc
CLK1
nc
nc
nc
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
VDDO
Q1
nQ1
Q2
nQ2
VDDO
Q3
nQ3
CLK0
CLK1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
0
1
CLK_EN
CLK_SEL
D
Q
LE


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