2

ICS9120-08

ICS9120-09

Pin Configuration

Pin Descriptions for ICS9120-08

Functionality

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

1

X1

Input

Crystal or external clock source. Has feedback bias for crystal.

Power

Power supply input.

3

GND

Power

Ground return for Pin 2.

4

CLK3

Output

16.934 MHz target output clock for stereo codec.

5

CLK1

Output

24.576 MHz target output clock for stereo codec.

6

CLK2

Output

33.868 MHz target output clock for OPL4.

7

REF

Output

14.318 MHz reference clock buffered output.

8

X2

Output

Crystal output drive.

Pin Descriptions for ICS9120-09

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

1

X1

Input

External clock source.

2

VDD

Power

Power supply input.

3

GND

Power

Ground return for Pin 2.

4

CLK3

Output

16.934 MHz target output clock for stereo codec.

5

CLK1

Output

24.576 MHz target output clock for stereo codec.

6

CLK2

Output

33.868 MHz target output clock for OPL4.

7

REF

Output

14.318 MHz reference clock buffered output.

8

PD#

Input

Power-down input powers down entire device when low; has pull-up.

be left disconnected or driven by open collector logic.

8-Pin SOIC

8-Pin SOIC

X1, X2

(MHz)

(-09 only)

PD#

33.9

(MHz)

16.9

(MHz)

24.6

(MHz)

14.3

(MHz)

-

0

Low

Low

Low

Low

14.318

1

33.868

16.934

24.576

14.318

-