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ICS9248-56 데이터시트(PDF) 1 Page - Integrated Circuit Systems |
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ICS9248-56 데이터시트(HTML) 1 Page - Integrated Circuit Systems |
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1 / 11 page ![]() Integrated Circuit Systems, Inc. General Description Features ICS9248-56 Block Diagram Frequency Timing Generator for Pentium II Systems 9248-56 Rev E 12/27/00 Pin Configuration 28 pin SSOP and TSSOP Pentium is a trademark on Intel Corporation. • Generates the following system clocks: - 2CPU(2.5V) up to 100MHz. - 6 PCI(3.3V) @ 33.3MHz (Includes one free running). - 1 REF clks (3.3V) at 14.318MHz. - 1 Fixed clock at 48MHz - 1 Fixed clock at 48 or 24MHz • Skew characteristics: - CPU – CPU<175ps - PCI – PCI < 500ps - CPU(early) – PCI = 1.5ns – 4ns. • Supports Spread Spectrum modulation for CPU and PCI clocks, 0.5% down spread • Efficient Power management scheme through stop clocks and power down modes. • Uses external 14.318MHz crystal, no external load cap required for CL=18pF crystal. • 28 pin 209mil SSOP and 173mil TSSOP The ICS9248-56 is the Main clock solution for Notebook designs using the Intel 440BX style chipset. Along with an SDRAM buffer such as the ICS9179-03, it provides all necessary clock signals for such a system. Spread spectrum may be enabled by driving pin 26, SPREAD# active (Low) at power-on. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-56 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Power Groups VDD, GND = PLL core VDDREF,GNDREF=REF(0:1),X1,X2 VDDPCI, GNDPCI = PCICLK_F, PCICLK (0:4) VDD48, GND48 = 48MHz, 48/24MHz ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. |
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